ItInsightsWorld views the launch as a category move: the xMCU line presented by Synaptics Inc. at its annual tech day packages the Astra SR200 series for multimodal edge AI. The stated technical premise is a real-time, device-native experience for voice, vision, audio, motion, and contextual sensing, enabled by heterogeneous compute, AI acceleration, and integrated high-bandwidth custom DRAM.
The design pairs up to 8 MB of SRAM with extensible high-bandwidth custom DRAM that can scale to hundreds of megabytes as models and workload patterns grow. Synaptics says this tiered memory arrangement runs workloads at one-third the power of typical system DRAM; the practical effect is less dependence on external memory in most applications while consuming only a small share of system power.
Because the memory path can scale with the model rather than constrain it, larger AI models and multimodal workloads can execute entirely on-device. Synaptics identifies AI wearables, battery-powered sensing devices, connected cameras, streamers, industrial vision, and voice systems as target uses.
Synaptics describes the Astra SR200 series through several vectors intended to improve flexibility: high-performance compute with expandable memory, transformer-ready AI acceleration, security rooted in silicon, multimodal integration, an ultra-low-power architecture with tiered domains, and an open-source software ecosystem.
For scalability beyond the base architecture, the xMCU series is delivered in three versions that are pin-compatible and share a common hardware foundation and software development kit (SDK).
| Version | AI performance | Positioning |
|---|---|---|
| SR210 | 200 GOPS | power-optimized path for always-on voice and sensing |
| SR230 | 300 GOPS | vision, display, and optional audio for mainstream multimodal devices |
| SR250 | 400 GOPS | dual vision and display paths for premium edge applications |
Astra SR200 xMCU (Source: Synaptics Inc.)
At the compute core, the SR200 Series uses the Synaptics Torq AI engine, a standards-based hardware architecture and unified developer experience that integrates the Coral NPU from Google Research. Synaptics describes the engine as optimized for low-latency, high-efficiency execution of deep-learning workloads across CNN, transformer, and fully connected networks. The MLIR/IREE compiler supports mainstream frameworks and model formats.
The platform claims the industry’s first pairing of Arm Cortex-M85 and Cortex-M52. At up to 800 MHz, the high-performance core covers control, multimedia, and burst-compute tasks, while the efficiency core handles always-on sensor fusion, connectivity, and low-power inference. An optional Cadence Tensilica HiFi 5 DSP can be added for audio and acoustic ML processing, and an always-on domain manages voice activity detection, timekeeping, and wake-up.
Security is built on a multi-layered engine combining hardware isolation, cryptographic acceleration, anti-tamper detection, device lifecycle management, and secure boot. The family targets PSA Level 3 and CC EAL4+ certification levels, addressing software and physical attack surfaces.
For system flexibility, the chip range includes high-speed octal SPI, SDIO, and eMMC storage interfaces, plus UART, SPI, I2C, I3C, PWM, USB 2.0, and low-power GPIOs. Industrial variants add 1Gb Ethernet with IEEE 1588 TSN support and two CAN-FD interfaces, supporting deterministic networking and real-time industrial control for physical AI and robotics. The software side also covers the open-source Torq NPU compiler and Zephyr RTOS.
Synaptics also introduced the Coralboard SR development board, built around the new SR200 Series. The Coralboard family was developed with Google Research, and both SL and SR boards present an edge AI developer experience through the MLIR-based Synaptics Torq compiler and runtime. The hardware and software are open for edge AI uses such as wearables, hearables, smart home appliances, automation hubs, industrial control systems, and robotics.
The Torq open-source toolchain supports popular ML frameworks and is designed for day-0 support of edge AI model families, including Google Gemma3 270M, which reaches up to 12-16 tokens/second with INT8 and 4-bit quantization respectively, plus LiquidAI LFM2.5 and Ultralytics YOLO26. Active-research techniques cited by Synaptics include batch-prefill and dynamic quantization.
Coralboard development board (Source: Synaptics Inc.)
The Coralboard SR includes the Astra SR250 Series, an 800-MHz Arm Cortex M85, Cortex M52, a 400 GOPS Torq/Coral NPU, NOR flash memory, a microSD card slot, integrated SRAM up to 8 MB, and high-bandwidth custom DRAM up to 256 MB. Connectivity and expansion features include Wi-Fi/Bluetooth, QWICC and mikroBUS connectors, multi-camera and display support through CSI/DSI and USB, and support for dual ISPs and digital mics.
Synaptics said Coralboard SL is now generally available via DigiKey. The board uses the Astra SL2619, which combines the 1-TOPS Synaptics Torq NPU with the first implementation of the Coral NPU.
On the hardware side, the Astra SL2619 provides 2× 2-GHz Arm Cortex A55 cores, Cortex-M52, a 1-TOPS Torq/Coral NPU, 2-GB DDR4, NOR flash memory, and add-on HATs for HDMI display, power, camera, and digital mics. It shares the same expansion vocabulary as the Coralboard SR: Wi-Fi/Bluetooth, QWICC and mikroBUS connectors, CSI/DSI and USB camera/display paths, and support for dual ISPs and digital mics.
Starting October 20, 2026, Synaptics Coralboard units can be ordered through DigiKey. For ItInsightsWorld readers, the notable pattern is a memory-tiered xMCU family paired with two Coralboard developer entry points: Coralboard SR for SR200-based multimodal design and Coralboard SL for the Astra SL2619 platform.